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Freescale Semiconductor /MK61F15WS /DDR /CR16

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Interpret as CR16

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)QKREF 0RESERVED0CLKDLY 0RESERVED0 (0)LPCTRL0RESERVED

LPCTRL=0, QKREF=0

Description

DDR Control Register 16

Fields

QKREF

Quick Refresh

0 (0): Continue memory initialization

1 (1): Interrupt memory initialization and enter self-refresh mode
RESERVED

no description available
CLKDLY

Clock Delay
RESERVED

Reserved
LPCTRL

Low Power Control

0 (0): Disable

1 (1): Enable
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data